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MCP23008/MCP23S08
8-Bit I/O Expander with Serial Interface
Features
* 8-bit remote bidirectional I/O port - I/O pins default to input * High-speed I2CTM interface (MCP23008) - 100 kHz - 400 kHz - 1.7 MHz * High-speed SPI interface (MCP23S08) - 10 MHz * Hardware address pins - Three for the MCP23008 to allow up to eight devices on the bus - Two for the MCP23S08 to allow up to four devices using the same chip-select * Configurable interrupt output pin - Configurable as active-high, active-low or open-drain * Configurable interrupt source - Interrupt-on-change from configured defaults or pin change * Polarity Inversion register to configure the polarity of the input port data * External reset input * Low standby current: 1 A (max.) * Operating voltage: - 1.8V to 5.5V @ -40C to +85C (I-Temp) - 2.7V to 5.5V @ -40C to +85C (I-Temp) - 4.5V to 5.5V @ -40C to +125C (E-Temp)
Packages
* * * * 18-pin PDIP (300 mil) 18-pin SOIC (300 mil) 20-pin SSOP 20-pin QFN
Block Diagram
MCP23S08 SCK SI SO MCP23008 SCL SDA MCP23S08 A1:A0 A2:A0 RESET INT Interrupt Logic 8 VDD VSS POR Configuration/ Control Registers 3 Serial Interface Decode Control Serializer/ Deserializer GP0 GP1 GP2 GP3 GP4 GP5 GP6 GP7
8 GPIO
(c) 2007 Microchip Technology Inc.
DS21919D-page 1
MCP23008/MCP23S08
Package Types
MCP23008
PDIP/SOIC SCL SDA A2 A1 A0 RESET NC INT VSS 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 VDD GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0 SCL SDA A2 A1 A0 RESET NC INT VSS N/C 1 2 3 4 5 6 7 8 9 10 SSOP 20 19 18 17 16 15 14 13 12 11 VDD GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0 N/C
MCP23008
QFN SDA GP7 SCL VDD VSS
20
19
18
17
16
A2 A1 A0 RESET NC
1 2 3 4 5 10 6 7 8 9 MCP23008
15 14 13 12 11
GP6 GP5 GP4 GP3 GP2
GP0
GP1
N/C
N/C
INT
DS21919D-page 2
MCP23008
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
Package Types: (Continued)
PDIP/SOIC SCK SI SO A1 A0 RESET CS INT VSS 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 VDD GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0
MCP23S08
SCK SI SO A1 A0 RESET CS INT VSS N/C 1 2 3 4 5 6 7 8 9 10
SSOP 20 19 18 17 16 15 14 13 12 11 VDD GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0 N/C
MCP23S08
QFN SCK GP7 VDD VSS SI
20
19
18
17
16
A2 A1 A0 RESET CS
1 2 3 4 5 10 6 7 8 9 MCP23S08
15 14 13 12 11
GP6 GP5 GP4 GP3 GP2
GP0
(c) 2007 Microchip Technology Inc.
GP1
N/C
N/C
INT
MCP23S08
DS21919D-page 3
MCP23008/MCP23S08
NOTES:
DS21919D-page 4
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
1.0 DEVICE OVERVIEW
The MCP23X08 device provides 8-bit, general purpose, parallel I/O expansion for I2C bus or SPI applications. The two devices differ in the number of hardware address pins and the serial interface: * MCP23008 - I2C interface; three address pins * MCP23S08 - SPI interface; two address pins The MCP23X08 consists of multiple 8-bit configuration registers for input, output and polarity selection. The system master can enable the I/Os as either inputs or outputs by writing the I/O configuration bits. The data for each input or output is kept in the corresponding Input or Output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master. The interrupt output can be configured to activate under two conditions (mutually exclusive): 1. When any input state differs from its corresponding input port register state, this is used to indicate to the system master that an input state has changed. When an input state differs from a preconfigured register value (DEFVAL register).
2.
The Interrupt Capture register captures port values at the time of the interrupt, thereby saving the condition that caused the interrupt. The Power-on Reset (POR) sets the registers to their default values and initializes the device state machine. The hardware address pins are used to determine the device address.
1.1
Pin Descriptions
PINOUT DESCRIPTION
PDIP/ SOIC 1 2 3 QFN 19 20 1 SSOP 1 2 3 Pin Type I I/O I/O Serial clock input. Serial data I/O (MCP23008)/Serial data input (MCP23S08). Hardware address input (MCP23008)/ Serial data output (MCP23S08). A2 must be biased externally. Hardware address input. Must be biased externally. Hardware address input. Must be biased externally. External reset input. Must be biased externally. No connect (MCP23008)/External chip select input (MCP23S08). Interrupt output. Can be configured for active-high, active-low or open-drain. Ground. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. Power. -- Function
TABLE 1-1:
Pin Name SCL/SCK SDA/SI A2/SO
A1 A0 RESET NC/CS INT VSS GP0 GP1 GP2 GP3 GP4 GP5 GP6 GP7 VDD N/C
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 --
2 3 4 5 7 17 9 10 11 12 13 14 15 16 18 6, 8
4 5 6 7 8 9 12 13 14 15 16 17 18 19 20 10, 11
I I I I O P I/O I/O I/O I/O I/O I/O I/O I/O P --
(c) 2007 Microchip Technology Inc.
DS21919D-page 5
MCP23008/MCP23S08
1.2 Power-on Reset (POR)
1.3.2 1.3.2.1 I2CTM INTERFACE I2C Write Operation
The on-chip POR circuit holds the device in reset until VDD has reached a high enough voltage to deactivate the POR circuit (i.e., release the device from Reset). The maximum VDD rise time is specified in Section 2.0 "Electrical Characteristics". When the device exits the POR condition (releases reset), device operating parameters (i.e., voltage, temperature, serial bus frequency, etc.) must be met to ensure proper operation.
The I2C Write operation includes the control byte and register address sequence, as shown in the bottom of Figure 1-1. This sequence is followed by eight bits of data from the master and an Acknowledge (ACK) from the MCP23008. The operation is ended with a STOP or RESTART condition being generated by the master. Data is written to the MCP23008 after every byte transfer. If a STOP or RESTART condition is generated during a data transfer, the data will not be written to the MCP23008. Byte writes and sequential writes are both supported by the MCP23008. The MCP23008 increments its address counter after each ACK during the data transfer.
1.3
Serial Interface
This block handles the functionality of the I2C (MCP23008) or SPI (MCP23S08) interface protocol. The MCP23X08 contains eleven registers that can be addressed through the serial interface block (Table 1-2):
TABLE 1-2:
Address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah
REGISTER ADDRESSES
Access to: IODIR IPOL GPINTEN DEFVAL INTCON IOCON GPPU INTF INTCAP (Read-only) GPIO OLAT
1.3.2.2
I2C Read Operation
The I2C Read operation includes the control byte sequence, as shown in the bottom of Figure 1-1. This sequence is followed by another control byte (including the START condition and ACK) with the R/W bit equal to a logic 1 (R/W = 1). The MCP23008 then transmits the data contained in the addressed register. The sequence is ended with the master generating a STOP or RESTART condition.
1.3.2.3
I2C Sequential Write/Read
1.3.1
SEQUENTIAL OPERATION BIT
For sequential operations (Write or Read), instead of transmitting a STOP or RESTART condition after the data transfer, the master clocks the next byte pointed to by the address pointer (see Section 1.3.1 "Sequential Operation Bit" for details regarding sequential operation control). The sequence ends with the master sending a STOP or RESTART condition. The MCP23008 address pointer will roll over to address zero after reaching the last register address. Refer to Figure 1-1.
The Sequential Operation (SEQOP) bit (IOCON register) controls the operation of the address pointer. The address pointer can either be enabled (default) to allow the address pointer to increment automatically after each data transfer, or it can be disabled. When operating in Sequential mode (IOCON.SEQOP = 0), the address pointer automatically increments to the next address after each byte is clocked. When operating in Byte mode (IOCON.SEQOP = 1), the MCP23X08 does not increment its address counter after each byte during the data transfer. This gives the ability to continually read the same address by providing extra clocks (without additional control bytes). This is useful for polling the GPIO register for data changes.
1.3.3 1.3.3.1
SPI INTERFACE SPI Write Operation
The SPI Write operation is started by lowering CS. The Write command (slave address with R/W bit cleared) is then clocked into the device. The opcode is followed by an address and at least one data byte.
1.3.3.2
SPI Read Operation
The SPI Read operation is started by lowering CS. The SPI read command (slave address with R/W bit set) is then clocked into the device. The opcode is followed by an address, with at least one data byte being clocked out of the device.
DS21919D-page 6
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
FIGURE 1-1:
S - START SR - RESTART P - STOP w - Write SR SR P OP OP R W DOUT .... DIN .... DOUT DIN P P S OP W ADDR DIN .... DIN P
MCP23008 I2CTM DEVICE PROTOCOL
R - Read OP ADDR DOUT DIN - Device opcode - Device address - Data out from MCP23008 - Data into MCP23008
S
OP
R
DOUT
....
DOUT
P
SR
OP
R
DOUT
.... ....
DOUT
P
SR
OP P
W
ADDR
DIN
DIN
P
Byte and Sequential Write Byte Sequential S S OP OP W ADDR DIN DIN .... P DIN P
W ADDR
Byte and Sequential Read Byte S Sequential S
OP
OP
W
W
SR
SR
OP
OP
R
R
DOUT
DOUT
P
.... DOUT P
1.3.3.3
SPI Sequential Write/Read
1.4
Hardware Address Decoder
For sequential operations, instead of deselecting the device by raising CS, the master clocks the next byte pointed to by the address pointer. The sequence ends by the raising of CS. The MCP23S08 address pointer will roll over to address zero after reaching the last register address.
The hardware address pins are used to determine the device address. To address a device, the corresponding address bits in the control byte must match the pin state. * MCP23008 has address pins A2, A1 and A0. * MCP23S08 has address pins A1 and A0. The pins must be biased externally.
(c) 2007 Microchip Technology Inc.
DS21919D-page 7
MCP23008/MCP23S08
1.4.1 ADDRESSING I2C DEVICES (MCP23008) FIGURE 1-2: I2CTM CONTROL BYTE FORMAT
Control Byte S 0 1 0 0 A2 A1 A0 R/W ACK The MCP23008 is a slave I2C device that supports 7-bit slave addressing, with the read/write bit filling out the control byte. The slave address contains four fixed bits and three user-defined hardware address bits (pins A2, A1 and A0). Figure 1-2 shows the control byte format.
Slave Address Start bit R/W = 0 = write R/W = 1 = read R/W bit ACK bit
1.4.2
ADDRESSING SPI DEVICES (MCP23S08)
The MCP23S08 is a slave SPI device. The slave address contains five fixed bits and two user-defined hardware address bits (pins A1 and A0), with the read/ write bit filling out the control byte. Figure 1-3 shows the control byte format.
FIGURE 1-3:
CS
SPI CONTROL BYTE FORMAT
Control Byte 0 1 0 0 0 A1 A0 R/W
Slave Address R/W bit R/W = 0 = write R/W = 1 = read
FIGURE 1-4:
S 0 1 0
I2CTM ADDRESSING REGISTERS
0 A2 A1 A0 0 ACK A7 A6 A5 A4 A3 A2 A1 A0 ACK
R/W = 0 Device Opcode Register Address
The ACKs are provided by the MCP23008.
FIGURE 1-5:
CS 0 1 0
SPI ADDRESSING REGISTERS
0
0
A1 A0 R/W
A7
A6
A5
A4
A3
A2
A1
A0
Device Opcode
Register Address
DS21919D-page 8
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
1.5 GPIO Port 1.6
The GPIO module contains the data port (GPIO), internal pull up resistors and the Output Latches (OLAT). Reading the GPIO register reads the value on the port. Reading the OLAT register only reads the OLAT, not the actual value on the port. Writing to the GPIO register actually causes a write to the OLAT. Writing to the OLAT register forces the associated output drivers to drive to the level in OLAT. Pins configured as inputs turn off the associated output driver and put it in high-impedance.
Configuration and Control Registers
The Configuration and Control blocks contain the registers as shown in Table 1-3.
TABLE 1-3:
Register Name IODIR IPOL GPINTEN DEFVAL INTCON IOCON GPPU INTF INTCAP GPIO OLAT
CONFIGURATION AND CONTROL REGISTERS
bit 7 IO7 IP7 GPINT7 DEF7 IOC7 -- PU7 INT7 ICP7 GP7 OL7 bit 6 IO6 IP6 GPINT6 DEF6 IOC6 -- PU6 INT6 ICP6 GP6 OL6 bit 5 IO5 IP5 GPINT5 DEF5 IOC5 SREAD PU5 INT5 ICP5 GP5 OL5 bit 4 IO4 IP4 GPINT4 DEF4 IOC4 DISSLW PU4 INT4 ICP4 GP4 OL4 bit 3 IO3 IP3 GPINT3 DEF3 IOC3 HAEN* PU3 INT3 ICP3 GP3 OL3 bit 2 IO2 IP2 GPINT2 DEF2 IOC2 ODR PU2 INT2 ICP2 GP2 OL2 bit 1 IO1 IP1 GPINT1 DEF1 IOC1 INTPOL PU1 INT1 ICP1 GP1 OL1 bit 0 IO0 IP0 GPINT0 DEF0 IOC0 -- PU0 INTO ICP0 GP0 OL0 POR/RST value 1111 1111 0000 0000 0000 0000 0000 0000 0000 0000 --00 0000000 0000 0000 0000 0000 0000 0000 0000 0000 0000
Address (hex) 00 01 02 03 04 05 06 07 08 09 0A
* Not used on the MCP23008.
(c) 2007 Microchip Technology Inc.
DS21919D-page 9
MCP23008/MCP23S08
1.6.1 I/O DIRECTION (IODIR) REGISTER
Controls the direction of the data I/O. When a bit is set, the corresponding pin becomes an input. When a bit is clear, the corresponding pin becomes an output.
REGISTER 1-1:
R/W-1 IO7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
IODIR - I/O DIRECTION REGISTER (ADDR 0x00)
R/W-1 IO6 R/W-1 IO5 R/W-1 IO4 R/W-1 IO3 R/W-1 IO2 R/W-1 IO1 R/W-1 IO0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
IO7:IO0: These bits control the direction of data I/O <7:0> 1 = Pin is configured as an input. 0 = Pin is configured as an output.
DS21919D-page 10
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.2 INPUT POLARITY (IPOL) REGISTER
The IPOL register allows the user to configure the polarity on the corresponding GPIO port bits. If a bit is set, the corresponding GPIO register bit will reflect the inverted value on the pin.
REGISTER 1-2:
R/W-0 IP7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
IPOL - INPUT POLARITY PORT REGISTER (ADDR 0x01)
R/W-0 IP6 R/W-0 IP5 R/W-0 IP4 R/W-0 IP3 R/W-0 IP2 R/W-0 IP1 R/W-0 IP0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
IP7:IP0: These bits control the polarity inversion of the input pins <7:0> 1 = GPIO register bit will reflect the opposite logic state of the input pin. 0 = GPIO register bit will reflect the same logic state of the input pin.
(c) 2007 Microchip Technology Inc.
DS21919D-page 11
MCP23008/MCP23S08
1.6.3 INTERRUPT-ON-CHANGE CONTROL (GPINTEN) REGISTER
The GPINTEN register controls the interrupt-onchange feature for each pin. If a bit is set, the corresponding pin is enabled for interrupt-on-change. The DEFVAL and INTCON registers must also be configured if any pins are enabled for interrupt-on-change.
REGISTER 1-3:
R/W-0 GPINT7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
GPINTEN - INTERRUPT-ON-CHANGE PINS (ADDR 0x02)
R/W-0 GPINT6 R/W-0 GPINT5 R/W-0 GPINT4 R/W-0 GPINT3 R/W-0 GPINT2 R/W-0 GPINT1 R/W-0 GPINT0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
GPINT7:GPINT0: General purpose I/O interrupt-on-change bits <7:0> 1 = Enable GPIO input pin for interrupt-on-change event. 0 = Disable GPIO input pin for interrupt-on-change event. Refer to INTCON and GPINTEN.
DS21919D-page 12
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.4 DEFAULT COMPARE (DEFVAL) REGISTER FOR INTERRUPT-ONCHANGE
The default comparison value is configured in the DEFVAL register. If enabled (via GPINTEN and INTCON) to compare against the DEFVAL register, an opposite value on the associated pin will cause an interrupt to occur.
REGISTER 1-4:
R/W-0 DEF7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
DEFVAL - DEFAULT VALUE REGISTER (ADDR 0x03)
R/W-0 DEF6 R/W-0 DEF5 R/W-0 DEF4 R/W-0 DEF3 R/W-0 DEF2 R/W-0 DEF1 R/W-0 DEF0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
DEF7:DEF0: These bits set the compare value for pins configured for interrupt-on-change from defaults <7:0>. Refer to INTCON. If the associated pin level is the opposite from the register bit, an interrupt occurs. Refer to INTCON and GPINTEN.
(c) 2007 Microchip Technology Inc.
DS21919D-page 13
MCP23008/MCP23S08
1.6.5 INTERRUPT CONTROL (INTCON) REGISTER
The INTCON register controls how the associated pin value is compared for the interrupt-on-change feature. If a bit is set, the corresponding I/O pin is compared against the associated bit in the DEFVAL register. If a bit value is clear, the corresponding I/O pin is compared against the previous value.
REGISTER 1-5:
R/W-0 IOC7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
INTCON - INTERRUPT-ON-CHANGE CONTROL REGISTER (ADDR 0x04)
R/W-0 IOC6 R/W-0 IOC5 R/W-0 IOC4 R/W-0 IOC3 R/W-0 IOC2 R/W-0 IOC1 R/W-0 IOC0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
IOC7:IOC0: These bits control how the associated pin value is compared for interrupt-on-change <7:0> 1 = Controls how the associated pin value is compared for interrupt-on-change. 0 = Pin value is compared against the previous pin value. Refer to INTCON and GPINTEN.
DS21919D-page 14
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.6 CONFIGURATION (IOCON) REGISTER
contains several bits for The IOCON register configuring the device: * The Hardware Address Enable (HAEN) control bit enables/disables the hardware address pins (A1, A0) on the MCP23S08. This bit is not used on the MCP23008. The address pins are always enabled on the MCP23008. * The Open-Drain (ODR) control bit enables/ disables the INT pin for open-drain configuration. * The Interrupt Polarity (INTPOL) control bit sets the polarity of the INT pin. This bit is functional only when the ODR bit is cleared, configuring the INT pin as active push-pull.
* The Sequential Operation (SEQOP) controls the incrementing function of the address pointer. If the address pointer is disabled, the address pointer does not automatically increment after each byte is clocked during a serial transfer. This feature is useful when it is desired to continuously poll (read) or modify (write) a register. * The Slew Rate (DISSLW) bit controls the slew rate function on the SDA pin. If enabled, the SDA slew rate will be controlled when driving from a high to a low.
REGISTER 1-6:
U-0 -- bit 7 Legend: R = Readable bit -n = Value at POR bit 7-6 bit 5
IOCON - I/O EXPANDER CONFIGURATION REGISTER (ADDR 0x05)
U-0 -- R/W-0 SEQOP R/W-0 DISSLW R/W-0 HAEN R/W-0 ODR R/W-0 INTPOL U-0 -- bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
Unimplemented: Read as `0'. SEQOP: Sequential Operation mode bit. 1 = Sequential operation disabled, address pointer does not increment. 0 = Sequential operation enabled, address pointer increments. DISSLW: Slew Rate control bit for SDA output. 1 = Slew rate disabled. 0 = Slew rate enabled. HAEN: Hardware Address Enable bit (MCP23S08 only). Address pins are always enabled on MCP23008. 1 = Enables the MCP23S08 address pins. 0 = Disables the MCP23S08 address pins. ODR: This bit configures the INT pin as an open-drain output. 1 = Open-drain output (overrides the INTPOL bit). 0 = Active driver output (INTPOL bit sets the polarity). INTPOL: This bit sets the polarity of the INT output pin. 1 = Active-high. 0 = Active-low. Unimplemented: Read as `0'.
bit 4
bit 3
bit 2
bit 1
bit 0
(c) 2007 Microchip Technology Inc.
DS21919D-page 15
MCP23008/MCP23S08
1.6.7 PULL-UP RESISTOR CONFIGURATION (GPPU) REGISTER
The GPPU register controls the pull-up resistors for the port pins. If a bit is set and the corresponding pin is configured as an input, the corresponding port pin is internally pulled up with a 100 k resistor.
REGISTER 1-7:
R/W-0 PU7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
GPPU - GPIO PULL-UP RESISTOR REGISTER (ADDR 0x06)
R/W-0 PU6 R/W-0 PU5 R/W-0 PU4 R/W-0 PU3 R/W-0 PU2 R/W-0 PU1 R/W-0 PU0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
PU7:PU0: These bits control the weak pull-up resistors on each pin (when configured as an input) <7:0>. 1 = Pull-up enabled. 0 = Pull-up disabled.
DS21919D-page 16
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.8 INTERRUPT FLAG (INTF) REGISTER
Note: The INTF register reflects the interrupt condition on the port pins of any pin that is enabled for interrupts via the GPINTEN register. A `set' bit indicates that the associated pin caused the interrupt. This register is `read-only'. Writes to this register will be ignored. INTF will always reflect the pin(s) that have an interrupt condition. For example, one pin causes an interrupt to occur and is captured in INTCAP and INF. If before clearing the interrupt another pin changes, which would normally cause an interrupt, it will be reflected in INTF, but not INTCAP.
REGISTER 1-8:
R-0 INT7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
INTF - INTERRUPT FLAG REGISTER (ADDR 0x07)
R-0 INT6 R-0 INT5 R-0 INT4 R-0 INT3 R-0 INT2 R-0 INT1 R-0 INT0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
INT7:INT0: These bits reflect the interrupt condition on the port. Will reflect the change only if interrupts are enabled (GPINTEN) <7:0>. 1 = Pin caused interrupt. 0 = Interrupt not pending.
(c) 2007 Microchip Technology Inc.
DS21919D-page 17
MCP23008/MCP23S08
1.6.9 INTERRUPT CAPTURE (INTCAP) REGISTER
The INTCAP register captures the GPIO port value at the time the interrupt occurred. The register is `readonly' and is updated only when an interrupt occurs. The register will remain unchanged until the interrupt is cleared via a read of INTCAP or GPIO.
REGISTER 1-9:
R-x ICP7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
INTCAP - INTERRUPT CAPTURED VALUE FOR PORT REGISTER (ADDR 0x08)
R-x ICP6 R-x ICP5 R-x ICP4 R-x ICP3 R-x ICP2 R-x ICP1 R-x ICP0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
ICP7:ICP0: These bits reflect the logic level on the port pins at the time of interrupt due to pin change <7:0> 1 = Logic-high. 0 = Logic-low.
DS21919D-page 18
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
1.6.10 PORT (GPIO) REGISTER
The GPIO register reflects the value on the port. Reading from this register reads the port. Writing to this register modifies the Output Latch (OLAT) register.
REGISTER 1-10:
R/W-0 GP7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
GPIO - GENERAL PURPOSE I/O PORT REGISTER (ADDR 0x09)
R/W-0 GP6 R/W-0 GP5 R/W-0 GP4 R/W-0 GP3 R/W-0 GP2 R/W-0 GP1 R/W-0 GP0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
GP7:GP0: These bits reflect the logic level on the pins <7:0> 1 = Logic-high. 0 = Logic-low.
(c) 2007 Microchip Technology Inc.
DS21919D-page 19
MCP23008/MCP23S08
1.6.11 OUTPUT LATCH REGISTER (OLAT)
The OLAT register provides access to the output latches. A read from this register results in a read of the OLAT and not the port itself. A write to this register modifies the output latches that modify the pins configured as outputs.
REGISTER 1-11:
R/W-0 OL7 bit 7 Legend: R = Readable bit -n = Value at POR bit 7-0
OLAT - OUTPUT LATCH REGISTER 0 (ADDR 0x0A)
R/W-0 OL6 R/W-0 OL5 R/W-0 OL4 R/W-0 OL3 R/W-0 OL2 R/W-0 OL1 R/W-0 OL0 bit 0
W = Writable bit `1' = Bit is set
U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
OL7:OL0: These bits reflect the logic level on the output latch <7:0> 1 = Logic-high. 0 = Logic-low.
DS21919D-page 20
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
1.7 Interrupt Logic
FIGURE 1-6:
The interrupt output pin will activate if an internal interrupt occurs. The interrupt block is configured by the following registers: * GPINTEN - enables the individual inputs * DEFVAL - holds the values that are compared against the associated input port values * INTCON - controls if the input values are compared against DEFVAL or the previous values on the port * IOCON (ODR and INPOL) - configures the INT pin as push-pull, open-drain and active-level Only pins configured as inputs can cause interrupts. Pins configured as outputs have no affect on INT. Interrupt activity on the port will cause the port value to be captured and copied into INTCAP. The interrupt will remain active until the INTCAP or GPIO register is read. Writing to these registers will not affect the interrupt. The first interrupt event will cause the port contents to be copied into the INTCAP register. Subsequent interrupt conditions on the port will not cause an interrupt to occur as long as the interrupt is not cleared by a read of INTCAP or GPIO.
INTERRUPT-ON-PINCHANGE
GPx
INT Port value is captured into INTCAP
ACTIVE Read GPIU or INTCAP
ACTIVE Port value is captured into INTCAP
FIGURE 1-7:
INTERRUPT-ON-CHANGE FROM REGISTER DEFAULT
DEFVAL
GP:
7 X
6 X
5 X
4 X
3 X
2 0
1 X
0 X
GP2
1.7.1
INTERRUPT CONDITIONS
INT ACTIVE ACTIVE
There are two possible configurations to cause interrupts (configured via INTCON): 1. Pins configured for interrupt-on-pin-change will cause an interrupt to occur if a pin changes to the opposite state. The default state is reset after an interrupt occurs. For example, an interrupt occurs by an input changing from 1 to 0. The new initial state for the pin is a logic 0. Pins configured for interrupt-on-change from register value will cause an interrupt to occur if the corresponding input pin differs from the register bit. The interrupt condition will remain as long as the condition exists, regardless if the INTAP or GPIO is read.
Port value is captured into INTCAP
2.
Read GPIU or INTCAP (INT clears only if interrupt condition does not exist.)
See Figure 1-6 and Figure 1-7 for more information on interrupt operations.
(c) 2007 Microchip Technology Inc.
DS21919D-page 21
MCP23008/MCP23S08
NOTES:
DS21919D-page 22
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
2.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Ambient temperature under bias.............................................................................................................-40C to +125C Storage temperature .............................................................................................................................. -65C to +150C Voltage on VDD with respect to VSS ......................................................................................................... -0.3V to +5.5V Voltage on all other pins with respect to VSS (except VDD)............................................................. -0.6V to (VDD + 0.6V) Total power dissipation (Note) .............................................................................................................................700 mW Maximum current out of VSS pin ...........................................................................................................................150 mA Maximum current into VDD pin ..............................................................................................................................125 mA Input clamp current, IIK (VI < 0 or VI > VDD)...................................................................................................................... 20 mA Output clamp current, IOK (VO < 0 or VO > VDD) .............................................................................................................. 20 mA Maximum output current sunk by any output pin ....................................................................................................25 mA Maximum output current sourced by any output pin ...............................................................................................25 mA Note: Power dissipation is calculated as follows: PDIS = VDD x {IDD - IOH} + {(VDD-VOH) x IOH} + (VOL x IOL)
NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
(c) 2007 Microchip Technology Inc.
DS21919D-page 23
MCP23008/MCP23S08
2.1 DC Characteristics
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym VDD VPOR Min 1.8 -- Typ -- VSS Max 5.5 -- Units V V Conditions
DC Characteristics Param No. D001 D002
Characteristic Supply Voltage VDD Start Voltage to Ensure Power-on Reset VDD Rise Rate to Ensure Power-on Reset Supply Current Standby current
D003
SVDD
0.05
--
--
V/ms
Design guidance only. Not tested. SCL/SCK = 1 MHz 4.5V - 5.5V @ +125C (Note 1)
D004 D005
IDD IDDS
-- -- --
-- -- --
1 1 2
mA A A
Input Low-Voltage D030 D031 A0, A1 (TTL buffer) CS, GPIO, SCL/SCK, SDA, A2, RESET (Schmitt Trigger) Input High-Voltage D040 D041 A0, A1 (TTL buffer) CS, GPIO, SCL/SCK, SDA, A2, RESET (Schmitt Trigger) Input Leakage Current D060 D065 D070 I/O port pins Output Leakage Current I/O port pins GPIO weak pull-up current Output Low-Voltage D080 GPIO INT SO, SDA SDA Output High-Voltage D090 GPIO, INT, SO VOH VDD - 0.7 VDD - 0.7 Capacitive Loading Specs on Output Pins D101 D102 Note 1: GPIO, SO, INT SDA CIO CB -- -- -- -- 50 400 pF pF -- -- -- -- V IOH = -3.0 mA, VDD = 4.5V IOH = -400 A, VDD = 1.8V VOL -- -- -- -- -- -- -- -- 0.6 0.6 0.6 0.8 V V V V IOL = 8.5 mA, VDD = 4.5V IOL = 1.6 mA, VDD = 4.5V IOL = 3.0 mA, VDD = 1.8V IOL = 3.0 mA, VDD = 4.5V ILO IPU -- 40 -- 75 1 115 A A VSS VPIN VDD VDD = 5V, GP Pins = VSS -40C TA +85C IIL -- -- 1 A VSS VPIN VDD VIH 0.25 VDD + 0.8 0.8 VDD -- -- VDD VDD V V For entire VDD range. VIL VSS VSS -- -- 0.15 VDD 0.2 VDD V V
This parameter is characterized, not 100% tested.
DS21919D-page 24
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
FIGURE 2-1: LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS
VDD Pin 50 pF 135 pF
1 k SCL and SDA pin MCP23008
FIGURE 2-2:
VDD RESET
RESET AND DEVICE RESET TIMER TIMING
30
32
Internal RESET
34 Output pin
(c) 2007 Microchip Technology Inc.
DS21919D-page 25
MCP23008/MCP23S08
TABLE 2-1: DEVICE RESET SPECIFICATIONS
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym TRSTL THLD TIOZ Min 1 -- -- Typ(1) -- 0 -- Max -- -- 1 Units s s s VDD = 5.0V Conditions
AC Characteristics Param No. 30 32 34 Note 1:
Characteristic RESET Pulse Width (Low) Device Active After RESET high Output High-Impedance From RESET Low
This parameter is characterized, not 100% tested.
FIGURE 2-3:
I2CTM BUS START/STOP BITS TIMING
SCL 90 SDA
91 92
93
START Condition
STOP Condition
FIGURE 2-4:
I2CTM BUS DATA TIMING
103 100 101 106 102
SCL SDA In
90
91 109
107 109
92 110
SDA Out
DS21919D-page 26
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
TABLE 2-2:
2
I2CTM BUS DATA REQUIREMENTS
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) RPU (SCL, SDA) = 1 k, CL (SCL, SDA) = 135 pF
Sym Min Typ Max Units Conditions
I CTM AC Characteristics
Param No.
Characteristic
100
Clock High Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
THIGH 4.0 0.6 0.12 TLOW 4.7 1.3 0.32 TR (Note 1) -- 20 + 0.1 20 TF (Note 1) -- 20 + 0.1 CB(2) 20 TSU:STA 4.7 0.6 0.16 THD:STA 4.0 0.6 0.16 THD:DAT 0 0 0 TSU:DAT 250 100 0.01 TSU:STO 4.0 0.6 0.16 -- -- -- -- -- -- s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- -- -- -- ns ns s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- 3.45 0.9 0.15 s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- -- -- -- s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- -- -- -- s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) CB(2) -- -- -- -- -- -- -- -- -- -- -- -- 1000 300 160 300 300 80 s s s ns ns ns ns ns ns 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- -- -- -- s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp)
101
Clock Low Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
102
SDA and SCL Rise Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
103
SDA and SCL Fall Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
90
START Condition Setup Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
91
START Condition Hold Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
106
Data Input Hold Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
107
Data Input Setup Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
92
STOP Condition Setup Time: 100 kHz mode 400 kHz mode 1.7 MHz mode
Note 1: 2:
This parameter is characterized, not 100% tested. CB is specified to be from 10 to 400 pF.
(c) 2007 Microchip Technology Inc.
DS21919D-page 27
MCP23008/MCP23S08
TABLE 2-2:
2
I2CTM BUS DATA REQUIREMENTS (CONTINUED)
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) RPU (SCL, SDA) = 1 k, CL (SCL, SDA) = 135 pF
Sym Min Typ Max Units Conditions
I CTM AC Characteristics
Param No.
Characteristic
109
Output Valid From Clock: 100 kHz mode 400 kHz mode 1.7 MHz mode
TAA -- -- -- TBUF 4.7 1.3 N/A CB -- -- TSP -- -- -- -- 50 10 ns ns Spike suppression off -- -- 400 100 pF pF (Note 1) (Note 1) -- -- -- -- -- N/A s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) -- -- -- 3.45 0.9 0.18 s s s 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp)
110
Bus Free Time: 100 kHz mode 400 kHz mode 1.7 MHz mode Bus Capacitive Loading: 100 kHz and 400 kHz 1.7 MHz Input Filter Spike Suppression: (SDA and SCL) 100 kHz and 400 kHz 1.7 MHz
Note 1: 2:
This parameter is characterized, not 100% tested. CB is specified to be from 10 to 400 pF.
FIGURE 2-5:
SPI INPUT TIMING
3
CS 11 1 Mode 1,1 SCK Mode 0,0 4 SI MSb in LSb in high-impedance 5 6 7 2 10
SO
DS21919D-page 28
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
FIGURE 2-6: SPI OUTPUT TIMING
CS 8 9 2 Mode 1,1 Mode 0,0 12 SO MSb out 13 14 LSb out
SCK
SI
don't care
TABLE 2-3:
SPI INTERFACE AC CHARACTERISTICS
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym FCLK Min -- -- -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max 5 10 10 -- -- -- -- -- -- -- -- -- -- -- -- -- 2 2 -- -- -- Units MHz MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns s s ns ns ns 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) Note 1 Note 1 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp) Conditions 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp)
SPI Interface AC Characteristics Param No.
Characteristic Clock Frequency
1 2
CS Setup Time CS Hold Time
TCSS TCSH
50 100 50 50
3
CS Disable Time
TCSD
100 50 50
4
Data Setup Time
TSU
20 10 10
5
Data Hold Time
THD
20 10 10
6 7 8
CLK Rise Time CLK Fall Time Clock High Time
TR TF THI
-- -- 90 45 45
Note 1: 2:
This parameter is characterized, not 100% tested. TV = 90 ns (max) when address pointer rolls over from address 0x0A to 0x00.
(c) 2007 Microchip Technology Inc.
DS21919D-page 29
MCP23008/MCP23S08
TABLE 2-3: SPI INTERFACE AC CHARACTERISTICS (CONTINUED)
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym TLO Min 90 45 45 10 11 12
(2)
SPI Interface AC Characteristics Param No. 9
Characteristic Clock Low Time
Typ -- -- -- -- -- -- -- -- -- --
Max -- -- -- -- -- 90 45 45 -- 100
Units ns ns ns ns ns ns ns ns ns ns
Conditions 1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp)
Clock Delay Time Clock Enable Time Output Valid from Clock Low
TCLD TCLE TV
50 50 -- -- --
1.8V - 5.5V (I-Temp) 2.7V - 5.5V (I-Temp) 4.5V - 5.5V (E-Temp)
13 14 Note 1: 2:
Output Hold Time Output Disable Time
THO TDIS
0 --
This parameter is characterized, not 100% tested. TV = 90 ns (max) when address pointer rolls over from address 0x0A to 0x00.
FIGURE 2-7:
GPIO AND INT TIMING
SCL/SCK SDA/SI In
D1
D0 LSb of data byte zero during a write or read command, depending on parameter.
50
GPn Output Pin 51 INT Pin
INT pin active
inactive 53
GPn Input Pin
52 Register Loaded
DS21919D-page 30
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
TABLE 2-4: GP AND INT PINS
Operating Conditions (unless otherwise indicated): 1.8V VDD 5.5V at -40C TA +85C (I-Temp) 4.5V VDD 5.5V at -40C TA +125C (E-Temp) (Note 1) Sym TGPOV TINTD TGPIV TGPINT TGLITCH Min -- -- -- -- -- Typ -- -- -- -- -- Max 500 600 450 600 150 Units ns ns ns ns ns Conditions AC Characteristics Param No. 50 51 52 53 Note 1:
Characteristic Serial data to output valid Interrupt pin disable time GP input change to register valid IOC event to INT active Glitch Filter on GP Pins
This parameter is characterized, not 100% tested
(c) 2007 Microchip Technology Inc.
DS21919D-page 31
MCP23008/MCP23S08
NOTES:
DS21919D-page 32
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
3.0
3.1
PACKAGING INFORMATION
Package Marking Information
18-Lead PDIP (300 mil) XXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXX YYWWNNN Example: MCP23008-E/P^^ e3 0634256
18-Lead SOIC (300 mil)
Example:
XXXXXXXXXXXX XXXXXXXXXXXX XXXXXXXXXXXX YYWWNNN
MCP23008 E/SO^^ e3 0634256
20-Lead QFN
Example
XXXXX XXXXXX XXXXXX YWWNNN
23S08 e3 E/ML^^ 0637 256
20-Lead SSOP
Example:
XXXXXXXXXXXX XXXXXXXXXXXX YYWWNNN
MCP23S08 e3 E/SS^^ XXXXXXXXXXXX 0634256
Legend: XX...X Y YY WW NNN
e3
* Note:
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
(c) 2007 Microchip Technology Inc.
DS21919D-page 33
MCP23008/MCP23S08
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
N
NOTE 1 E1
1
2 D
3 E A2
A
A1 e b1 b
L
c
eB
Units Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing N e A A2 A1 E E1 D L c b1 b eB - .115 .015 .290 .240 .348 .115 .008 .040 .014 - MIN
INCHES NOM 8 .100 BSC - .130 - .310 .250 .365 .130 .010 .060 .018 - .210 .195 - .325 .280 .400 .150 .015 .070 .022 MAX
.430 Notes: 1. Pin 1 visual index feature may vary, but must be located with the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-018B
DS21919D-page 34
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
18-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
D N
E E1 NOTE 1 1 23 b
e h A2 c h
A
A1
L L1
Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer (optional) Foot Length Footprint Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom N e A A2 A1 E E1 D h L L1 c b 0 0.20 0.31 5 5 0.25 0.40 - 2.05 0.10 MIN
MILLMETERS NOM 18 1.27 BSC - - - 10.30 BSC 7.50 BSC 11.55 BSC - - 1.40 REF - - - - - 8 0.33 0.51 15 0.75 1.27 2.65 - 0.30 MAX
15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-051B
(c) 2007 Microchip Technology Inc.
DS21919D-page 35
MCP23008/MCP23S08
16-Lead Plastic Quad Flat, No Lead Package (ML) - 4x4x0.9 mm Body [QFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
D EXPOSED PAD
D2
e E E2 2 1 b
2 1
N TOP VIEW NOTE 1
N BOTTOM VIEW L
K
A A1
A3
Units Dimension Limits Number of Pins Pitch Overall Height Standoff Contact Thickness Overall Width Exposed Pad Width Overall Length Exposed Pad Length Contact Width Contact Length Contact-to-Exposed Pad N e A A1 A3 E E2 D D2 b L K 2.50 0.25 0.30 0.20 2.50 0.80 0.00 MIN
MILLIMETERS NOM 16 0.65 BSC 0.90 0.02 0.20 REF 4.00 BSC 2.65 4.00 BSC 2.65 0.30 0.40 - 2.80 0.35 0.50 - 2.80 1.00 0.05 MAX
Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-127B
DS21919D-page 36
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
20-Lead Plastic Shrink Small Outline (SS) - 5.30 mm Body [SSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
D N
E E1
NOTE 1 12 b e
A
A2
c
A1 L1
Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint Lead Thickness Foot Angle Lead Width N e A A2 A1 E E1 D L L1 c b 0.09 0 0.22 - 1.65 0.05 7.40 5.00 6.90 0.55 MIN MILLIMETERS NOM 20 0.65 BSC - 1.75 - 7.80 5.30 7.20 0.75 1.25 REF - 4 - 0.25 8 0.38 2.00 1.85 - 8.20 5.60 7.50 0.95 MAX
L
Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.20 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-072B
(c) 2007 Microchip Technology Inc.
DS21919D-page 37
MCP23008/MCP23S08
NOTES:
DS21919D-page 38
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
APPENDIX A: REVISION HISTORY
Revision D (February 2007)
1. 2. 3. 4. Changed Byte and Sequential Read in Figure 1-1 from "R" to "W". Table 2-4, Param No. 51 and 53: Changed from 450 to 600 and 500 to 600, respecively. Added disclaimer to package outline drawings. Updated package outline drawings.
Revision C (October 2006)
1. 2. Added 20-pin QFN package information throughout document. Added disclaimer to package outline drawings.
Revision B (February 2005)
The following is the list of modifications: 1. Section 1.6 "Configuration and Control Registers". Added Hardware Address Enable (HAEN) bit to Table 1-3. Section 1.6.6 "Configuration (IOCON) Register". Added Hardware Address Enable (HAEN) bit to Register 1-6.
2.
Revision A (December 2004)
* Original Release of this Document.
(c) 2007 Microchip Technology Inc.
DS21919D-page 39
MCP23008/MCP23S08
NOTES:
DS21919D-page 40
(c) 2007 Microchip Technology Inc.
MCP23008/MCP23S08
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device
-
X
/XX Package
Examples: a) b) Extended Temp., 18LD PDIP package. MCP23008-E/SO: Extended Temp., 18LD SOIC package. MCP23008T-E/SO: Tape and Reel, Extended Temp., 18LD SOIC package. MCP23008-E/SS: Extended Temp., 20LD SSOP package. MCP23008T-E/SS: Tape and Reel, Extended Temp., 20LD SSOP package. MCP23008-E/ML: Extended Temp., 20LD QFN package. MCP23008-E/P:
Temperature Range
Device
MCP23008: MCP23008T: MCP23S08: MCP23S08T:
8-Bit I/O Expander w/ I2CTM Interface 8-Bit I/O Expander w/ I2C Interface (Tape and Reel) 8-Bit I/O Expander w/ SPI Interface 8-Bit I/O Expander w/ SPI Interface (Tape and Reel)
c)
d) e)
Temperature Range
E
=
-40C to +125C (Extended) *
f)
* While these devices are only offered in the "E" temperature range, the device will operate at different voltages and temperatures as identified in the Section 2.0 "Electrical Characteristics". Package ML P SO SS = = = = Plastic Quad Flat, No Lead Package 4x4x0.9 mm Body (QFN), 20-Lead Plastic DIP (300 mil Body), 18-Lead Plastic SOIC (300 mil Body), 18-Lead SSOP, (209 mil Body, 5.30 mm), 20-Lead
a) b) c)
MCP23S08-E/P: MCP23S08-E/SO: MCP23S08T-E/SO:
d) e)
MCP23S08-E/SS: MCP23S08T-E/SS:
f)
MCP23S08T-E/MF:
Extended Temp., 18LD PDIP package. Extended Temp., 18LD SOIC package. Tape and Reel, Extended Temp., 18LD SOIC package. Extended Temp., 20LD SSOP package. Tape and Reel, Extended Temp., 20LD SSOP package. Tape and Reel, Extended Temp., 20LD QFN package.
(c) 2007 Microchip Technology Inc.
DS21919D-page 41
MCP23008/MCP23S08
NOTES:
DS21919D-page 42
(c) 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2007 Microchip Technology Inc.
DS21919D-page 43
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
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ASIA/PACIFIC
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EUROPE
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12/08/06
DS21919D-page 44
(c) 2007 Microchip Technology Inc.

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